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Huawei H13-231 Exam Syllabus Topics:
| Section | Weight | Objectives |
|---|---|---|
| Kunpeng Computing Solution Design and Practice | 60% | - Solution design scenarios
|
| Key Technologies and Applications | 25% | - Core technologies
|
| Insight into Computing Industry Ecosystem | 5% | - Overview of the computing industry and trends
|
| Kunpeng Computing System Optimization | 10% | - Optimization practices
|
Huawei HCIE-Intelligent Computing V1.0 Sample Questions:
1. Although the use of Hyper-Threading technology can simultaneously execute two threads, but it's not like two real CPU as each CPU has its own resources, so performance is not equal to two Hyper-Threading CPU performance.
A) False
B) True
2. ARM microprocessors have been popularized in industrial control, consumer electronics, communication systems, network systems, wireless systems and other product markets. Which of the following descriptions of the characteristics of the ARM architecture is wrong?
A) Adopt a complex instruction set. High processing efficiency
B) The same function and performance occupy a small chip area, low power consumption, higher integration, and more hardware CPU cores.
C) It supports 16-bit, 32-bit, and 64-bit multiple instruction sets, and is well compatible with various application scenarios from OT, terminal to cloud.
D) A large number of registers are used, and most data operations are completed in the registers, and the instruction execution speed is faster.
3. The size of the cache is also one of the important indicators of the CPU, and the structure and size of the cache have a great impact on the CPU speed. Which of the following statements about the CPU cache is wrong?
A) The second-level cache is the second-level cache of the CPU, divided into internal and external chips.
B) The CPU cache is divided into three levels, the most important of which is the three-level cache, where 80% of the data is stored.
C) The first level cache is the first level cache of the CPU. It has the highest technical difficulty and manufacturing cost and is divided into data cache and instruction cache.
D) The third-level cache is a cache designed for missed data after reading the second-level cache.
4. After the ARMv7 architecture, the name of ARM's processor architecture is changed to Cortex. Which ARM architecture does Huawei's self-developed mobile phone processor chip use?
A) Cortex-R
B) Cortex-A
C) Cortex-M
5. Intelligent Platform Management Interface (IPMI) is an open standard hardware management interface specification, which defines the specific method for the management subsystem to communicate?
A) Combined
B) Embedded
C) Access
D) Tiled
Solutions:
| Question # 1 Answer: B | Question # 2 Answer: A | Question # 3 Answer: B | Question # 4 Answer: B | Question # 5 Answer: B |
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